Service manual

8224 N/B Maintenance

• 2K bytes External SRAM

 Host interface

• Software Optional with LPC Interface

• Primary Programmable I/O Address Communication Port in LPC Mode

• Support SERIRQ in LPC Interface

• Support Hardware Fast Gate A20 and KBRST

• Support Port 92h

 SMBus

• Support 2 SMBus Interface support Master Mode

 Timers

• Support Four Timer Signal with Three Pre-scalars

• Timer 1 and 2 Shard the Same Pre-scalar and are Free-Running Only

• Timer X and Y Have Individual Pre-scalar and Support up to Four Control Modes, Free

• Running, Pulse Output, Event Counter and Pulse Width Measurement

MiTac Secret

Confidential Document