Service manual

8224 N/B Maintenance

• Merom support

• 533 MHz and 667MHz Front Side Bus (FSB) support

• Source synchronous double-pumped (2x) Address

• Source synchronous quad-pumped (4x) Data

• Other key features are:

-- Support for DBI (Data Bus Inversion)

-- Support for MSI (Message Signaled Interrupt)

-- 32-bit interface to address up to 4 GB of memory

-- A 12 deep In-Order Queue to pipeline FSB commands

-- GTL+ bus driver with integrated GTL termination resistors

 Memory System

• Support Single/Dual Channel DDR2 SDRAM

• Maximum Memory supported 2 GB

• 64 bit wide per channel

• Three Memory Channel Configurations supported

-- Single Channel

-- Dual Channel Symmetric

MiTac Secret

Confidential Document