Service manual

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8575
A N/B Maintenance
A N/B Maintenance
The integrated Universal Serial Bus Host Controllers features Dual Independent OHCI Compliant Host
controllers with six USB ports delivering 2 x 12 Mb/s bandwidth and rich connectivity. Besides, each port can
be optionally configured as the wake-up source. Legacy USB devices as well as over current detection are also
implemented. The integrated IDE Master/Slave controllers features Dual Independent IDE channels supporting
PIO mode 0,1,2,3,4, and Ultra DMA 33/66/100. It provides two separate data paths for the dual IDE channels
that sustain the high data transfer rate in the multitasking environment. The MuTIOLĀ® Connect to PCI bridge
supporting 6 PCI master is compliant to PCI 2.2 specification. The SiS961 also incorporates the legacy system
I/O like: two 8237A compatible DMA controllers, three 8254 compatible programmable 16-bit counters,
hardwired keyboard controller and PS2 mouse interface, Real Time clock with 256B CMOS SRAM and two
8259A compatible Interrupt controllers. Besides, the I/O APIC managing up to 24 interrupts with both Serial
and FSB interrupt delivery modes is supported.
The integrated power management module incorporates the ACPI 1.0b compliance functions, the APM 1.2
compliance functions, and the PCI bus power management interface spec. v1.1. Numerous power-up events
and power down events are also supported. 21 general purposed I/O pins are provided to give an easy to use
logic for specific application. In addition, the SiS961 supports Intel Speed Step technology and Deeper Sleep
power state for Intel Mobile processor. For AMD processor, the SiS961 use the CPUSTP# signal to reduce
processor voltage during C3 and S1 state.