User Guide

8081

N/B Maintenance

Supports serial interrupt protocol

Supports processor system bus interrupt delivery New: 1.5 V operation with 3.3 V I/O

5 V tolerant buffers on IDE, PCI, USB over current and legacy signals Timers Based on 82C54

System timer, refresh request, speaker tone output Power Management Logic

ACPI 2.0 compliant

ACPI-defined power states (C1–C2, S3–S5 )

Supports Desktop S1 state (like C2 state, only STPCLK# active)

ACPI power management timer

PCI PME# support

SMI# generation

All registers readable/restorable for proper resume from 0 V suspend states External Glue Integration

Integrated pull-up, pull-down and series termination resistors on IDE, processor interface

Integrated Pull-down and Series resistors on USB Enhanced Hub Interface Buffers Improve Routing flexibility

(Not available with all Memory Controller Hubs)