User Guide

8081

N/B Maintenance

to integrated GUI, Montara-GM GMCH also can support external AGP slot with AGP 1X/2X/4X capability and

Fast Write Transactions. A high bandwidth and mature Intel®’ I/O Hub architecture is incorporated to connect

Montara-GM GMCH and INTEL 82801DBM ICH4-Mtogether. Intel®’ I/O Hub architecture is developed into

three layers, the Multi-threaded I/O Link Layer delivering 1.2GB bandwidth to connect embedded DMA Master

devices and external PCI masters to interface to Multi-threaded I/O Link layer, the Multi-threaded I/O Link

Encoder/Decoder in INTEL 82801DBM ICH4-M to transfer data w/ 533 MB/s bandwidth from/to Multi-threaded

I/O Link layer to/from Montara-GM GMCH, and the Multi-threaded I/O Link Encoder/Decoder in Montara-GM

GMCH to transfer data w/ 533 MB/s from/to Multi-threaded I/O Link layer to/from Intel 82801DBM ICH4-M.

An Unified Memory Controller supporting DDR266 DRAM is incorporated, delivering a high performance data

transfer to/from memory subsystem from/to the Host processor, the integrated graphic engine or external AGP

master, or the I/O bus masters. The memory controller also supports the Suspend to RAM function by retaining the

CKE# pins asserted in ACPI S3 state in which only AUX source deliver power. The Montara-GM GMCH adopts

the Shared Memory Architecture, eliminating the need and thus the cost of the frame buffer memory by organizing

the frame buffer in the system memory. The frame buffer size can be allocated from 8MB to 64MB.

Processor/Host Bus Support

- Intel

Banias processor

- 2X Address, 4X data

- Support host bus Dynamic Bus Inversion (DBI)

- Supports system bus at 400MT/s (100 MHz)

- Supports 64-bit host bus addressing

- 8-deep In-Order-Queue

Features :