Specifications

C0F
∗∗
(Sensor malfunctions)
∗
Code Description Detection Timing
∗
C0F02 Original Size Detecting
Board UN2 malfunction
<In F7 mode>
1) The Busy signal does not go LOW within approx. 800
msec. after the Initial signal has gone LOW, or
undefined data is input to the Master CPU.
2) If 1 is checked okay, the Busy signal goes HIGH
within approx. 200 msec.
3) If both 1 and 2 are checked okay, the Busy signal
does not go HIGH within approx. 400 msec.
4) If 1, 2 and 3 are checked okay, undefined data is
input to the Master CPU within approx. 500 msec.
<Under normal conditions>
1) The Busy signal remains HIGH or LOW for approx.
3,000 msec or more.
2) Undefined data is input to the Master CPU.
<When the Power Switch S1 is turned ON>
1) The Busy signal remains HIGH or LOW for approx.
5,000 msec or more.
2) Undefined data is input to the Master CPU.
H
L
1075T177CA
Initial Signal
Busy Signal
1) 2) 3) 4)
800msec 200msec 400msec 500msec
1075T178CA
Busy Signal
70msec. 70msec. 70msec. 70msec.
H
L
1075T179CA
Busy Signal
5000 msec
H
L
Busy Signal
T-60