Specifications

mikroElektronika | Free Online Book | PIC Microcontrollers | Chapter 4: Timers
Fig. 4-13 Timer TMR2
The pulses from the quartz oscillator first pass through the prescaler whose rate may be changed by combining the
T2CKPS1 and T2CKPS0 bits. The output of the prescaler is then used to increment the TMR2 register starting from 00h. The
values of TMR2 and PR2 are constantly compared and the TMR2 register keeps on being incremented until it matches the
value in PR2. When a match occurs, the TMR2 register is automatically cleared to 00h. The timer TMR2 Postscaler is
incremented and its output is used to generate an interrupt if it is enabled.
The TMR2 and PR2 registers are both fully readable and writable. Counting may be stopped by clearing the TMR2ON bit,
which contributes to power saving.
As a special option, the moment of TMR2 reset may be also used to determine synchronous serial communication baud
rate.
The timer TMR2 is controlled by several bits of the T2CON register.
T2CON Register
Fig. 4-14 T2CON Register
TOUTPS3 - TOUTPS0 - Timer2 Output Postcaler Select bits are used to determine the postscaler rate according to the
following table:
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