Specifications

mikroElektronika | Free Online Book | PIC Microcontrollers | Chapter 4: Timers
Fig. 4-4 The function of the PSA bit 1
As seen, the logic state of the PSA bit determines whether the prescaler is to be assigned to the timer/counter or watch-
dog timer.
Additionally it is also worth mentioning:
● When the prescaler is assigned to the timer/counter, any write to the TMR0 register will clear the prescaler;
● When the prescaler is assigned to watch-dog timer, a CLRWDT instruction will clear both the prescaler and WDT;
● Writing to the TMR0 register used as a timer, will not cause the pulse counting to start immediately, but with two
instruction cycles delay. Accordingly, it is necessary to adjust the value written to the TMR0 register;
● When the microcontroller is setup in sleep mode, the oscillator is turned off. Overflow cannot occur since there are
no pulses to count. This is why the TMR0 overflow interrupt cannot wake up the processor from Sleep mode;
● When used as an external clock counter without prescaler, a minimal pulse length or a pause between two pulses
must be 2 Tosc + 20 nS. Tosc is the oscillator signal period;
● When used as an external clock counter with prescaler, a minimal pulse length or a pause between two pulses is
10nS;
● The 8-bit prescaler register is not available to the user, which means that it cannot be directly read or written to;
● When changing the prescaler assignment from TMR0 to the watch-dog timer, the following instruction sequence
must be executed in order to avoid reset:
BANKSEL TMR0
CLRWDT ;CLEAR WDT
CLRF TMR0 ;CLEAR TMR0 AND PRESCALER
BANKSEL OPTION_REG
BSF OPTION_REG,PSA ;PRESCALER IS ASSIGNED TO THE WDT
CLRWDT ;CLEAR WDT
MOVLW b’11111000’ ;SELECT BITS PS2,PS1,PS0 AND CLEAR
ANDWF OPTION_REG,W ;THEM BY INSTRUCTION “LOGICAL AND”
IORLW b’00000101’ ;BITS PS2, PS1, AND PS0 SET
MOVWF OPTION_REG ;PRESCALER RATE TO 1:32
● Likewise, when changing the prescaler assignment from the WDT to the TMR0, the following instruction sequence
must be executed:
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