Specifications

mikroElektronika | Free Online Book | PIC Microcontrollers | Chapter 8: Other MCU's Circuits
Fig. 8-15 Fail-Safe Clock Monitor
The fail-safe clock monitor detects a failed oscillator by comparing the internal and external clock sources. In case it
takes more than 2mS for the external oscillator clock to come, the clock source will be automatically switched. The
internal oscillator will thereby continue operating controlled by the bits of the OSCCON register. When the OSFIE bit of
the PIE2 register is set, an interrupt will be generated. The system clock will continue to be sourced from internal clock
until the device successfully restarts the external oscillator and switches back to external operation.
Similarly to the previous cases, this module is enabled by changing configuration word just before the programming of
chip starts. This time, it is done by selecting the Fail-Safe Clk. Monitor option.
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