Specifications
mikroElektronika | Free Online Book | PIC Microcontrollers | Chapter 6: Serial Communication Modules
CKP = 1:
● 1 - Data is transmitted on falling edge of clock pulse (1 - 0); and
● 0 - Data is transmitted on rising edge of clock pulse (0 - 1).
D/A - Data/Address bit is used in I²C mode only.
● 1 - Indicates that the last byte received or transmitted was data; and
● 0 - Indicates that the last byte received or transmitted was address.
P - Stop bit is used in I²C mode only.
● 1 - STOP bit was detected last; and
● 0 - STOP bit was not detected last.
S - Start bit is used in I²C mode only.
● 1 - START bit was detected last; and
● 0 - START bit was not detected last.
R/W - Read Write bit is used in I²C mode only. This bit holds the R/W bit information following the last address match.
This bit is only valid from the address match to the next Start bit, Stop bit or not ACK bit.
In I²C slave mode
● 1 - Data read; and
● 0 - Data write.
In I²C master mode
● 1 - Transmit is in progress; and
● 0 - Transmit is not in progress.
UA - Update Address bit is used in 10-bit I²C mode only.
● 1 - Indicates that it is necessary to update the address in the SSPADD register; and
● 0 - Address in the SSPADD register is correct and does not need to be updated.
BF Buffer Full Status bit
During data receive (in SPI and I²C modes)
● 1 - Receive complete. The SSPBUF register is full; and
● 0 - Receive not complete. The SSPBUF register is empty.
During data transmit (in I²C mode only)
● 1 - Data transmit in progress (does not include the bits ACK and STOP); and
● 0 - Data transmit complete (does not include the bits ACK and STOP).
SSPCON Register
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