Datasheet
2004 Microchip Technology Inc. DS39609B-page 369
PIC18F6520/8520/6620/8620/6720/8720
Clock Synchronization and the CKP bit ................... 177
Control Registers (general) ......................................157
Enabling SPI I/O ...................................................... 161
I
2
C Mode .................................................................. 166
Acknowledge Sequence Timing ...................... 190
Baud Rate Generator ....................................... 183
Bus Collision
During a Repeated Start Condition .......... 194
Bus Collision During a Start Condition .............192
Bus Collision During a Stop Condition .............195
Clock Arbitration ..............................................184
Effect of a Reset .............................................. 191
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2
C Clock Rate w/BRG .....................................183
Master Mode .................................................... 181
Reception .................................................187
Repeated Start Timing ............................. 186
Master Mode Start Condition ........................... 185
Master Mode Transmission .............................187
Multi-Master Communication, Bus Collision
and Arbitration .........................................191
Multi-Master Mode ...........................................191
Registers ..........................................................166
Sleep Operation ............................................... 191
Stop Condition Timing .....................................190
I
2
C Mode. See I
2
C.
Module Operation ....................................................170
Operation ................................................................. 160
Slave Mode ..............................................................170
Addressing .......................................................170
Reception ......................................................... 171
Transmission ...................................................171
SPI
Master Mode .................................................... 162
SPI Clock ......................................................... 162
SPI Master Mode .....................................................162
SPI Mode ................................................................. 157
SPI Mode. See SPI.
SPI Slave Mode .......................................................163
Select Synchronization .................................... 163
SSPBUF Register .................................................... 162
SSPSR Register ...................................................... 162
Typical Connection .................................................. 161
MSSP Module
SPI Master/Slave Connection ..................................161
MULLW ............................................................................286
MULWF ............................................................................286
N
NEGF ...............................................................................287
NOP ................................................................................. 287
O
Opcode Field Descriptions ............................................... 260
OPTION_REG Register
PSA Bit ..................................................................... 133
T0CS Bit ...................................................................133
T0PS2:T0PS0 Bits ................................................... 133
T0SE Bit ...................................................................133
Oscillator Configuration ...................................................... 21
EC ..............................................................................21
ECIO .......................................................................... 21
HS ..............................................................................21
HS + PLL ...................................................................21
LP ...............................................................................21
RC ..............................................................................21
RCIO ..........................................................................21
XT ..............................................................................21
Oscillator Selection .......................................................... 239
Oscillator Switching Feature .............................................. 24
Oscillator Transitions ................................................. 26
System Clock Switch Bit ............................................ 25
Oscillator, Timer1 ............................................. 135, 137, 145
Oscillator, Timer3 ............................................................. 143
Oscillator, WDT ................................................................ 250
P
Packaging Information ..................................................... 357
Details ...................................................................... 358
Marking .................................................................... 357
Parallel Slave Port (PSP) ......................................... 111, 128
Associated Registers ............................................... 130
RE0/RD
/AN5 Pin ..................................................... 128
RE1/WR
/AN6 Pin .................................................... 128
RE2/CS
/AN7 Pin ..................................................... 128
Read Waveforms ..................................................... 130
Select (PSPMODE Bit) .................................... 111, 128
Write Waveforms ..................................................... 129
Parallel Slave Port Requirements (PIC18F8X20) ............ 330
PICkit 1 Flash Starter Kit ................................................. 305
PICSTART Plus Development Programmer .................... 303
PIE Registers ..................................................................... 95
Pin Functions
AV
DD .......................................................................... 20
AV
SS .......................................................................... 20
MCLR
/VPP ................................................................. 11
OSC1/CLKI ................................................................ 11
OSC2/CLKO/RA6 ...................................................... 11
RA0/AN0 .................................................................... 12
RA1/AN1 .................................................................... 12
RA2/AN2/V
REF- ......................................................... 12
RA3/AN3/V
REF+ ........................................................ 12
RA4/T0CKI ................................................................ 12
RA5/AN4/LVDIN ........................................................ 12
RA6 ............................................................................ 12
RB0/INT0 ................................................................... 13
RB1/INT1 ................................................................... 13
RB2/INT2 ................................................................... 13
RB3/INT3/CCP2 ........................................................ 13
RB4/KBI0 ................................................................... 13
RB5/KBI1/PGM .......................................................... 13
RB6/KBI2/PGC .......................................................... 13
RB7/KBI3/PGD .......................................................... 13
RC0/T1OSO/T13CKI ................................................. 14
RC1/T1OSI/CCP2 ..................................................... 14
RC2/CCP1 ................................................................. 14
RC3/SCK/SCL ........................................................... 14
RC4/SDI/SDA ............................................................ 14
RC5/SDO ................................................................... 14
RC6/TX1/CK1 ............................................................ 14
RC7/RX1/DT1 ............................................................ 14
RD0/PSP0/AD0 ......................................................... 15
RD1/PSP1/AD1 ......................................................... 15
RD2/PSP2/AD2 ......................................................... 15
RD3/PSP3/AD3 ......................................................... 15
RD4/PSP4/AD4 ......................................................... 15
RD5/PSP5/AD5 ......................................................... 15
RD6/PSP6/AD6 ......................................................... 15
RD7/PSP7/AD7 ......................................................... 15
RE0/RD
/AD8 ............................................................. 16
RE1/WR
/AD9 ............................................................. 16
RE2/CS
/AD10 ............................................................ 16
RE3/AD11 .................................................................. 16