Datasheet

© 2008 Microchip Technology Inc. DS39646C-page 97
PIC18F8722 FAMILY
7.0 EXTERNAL MEMORY BUS
The External Memory Bus (EMB) allows the device to
access external memory devices (such as Flash,
EPROM, SRAM, etc.) as program or data memory. It
supports both 8-bit and 16-bit Data Width modes and
four address widths from 8 to 20 bits.
The bus is implemented with 28 pins, multiplexed
across four I/O ports. Three ports (PORTD, PORTE
and PORTH) are multiplexed with the address/data bus
for a total of 20 available lines, while PORTJ is
multiplexed with the bus control signals.
A list of the pins and their functions is provided in
Table 7-1.
TABLE 7-1: PIC18F8527/8622/8627/8722 EXTERNAL BUS – I/O PORT FUNCTIONS
Note: The External Memory Bus is not imple-
mented on PIC18F6527/6622/6627/6722
(64-pin) devices.
Name Port Bit External Memory Bus Function
RD0/AD0 PORTD 0 Address bit 0 or Data bit 0
RD1/AD1 PORTD 1 Address bit 1 or Data bit 1
RD2/AD2 PORTD 2 Address bit 2 or Data bit 2
RD3/AD3 PORTD 3 Address bit 3 or Data bit 3
RD4/AD4 PORTD 4 Address bit 4 or Data bit 4
RD5/AD5 PORTD 5 Address bit 5 or Data bit 5
RD6/AD6 PORTD 6 Address bit 6 or Data bit 6
RD7/AD7 PORTD 7 Address bit 7 or Data bit 7
RE0/AD8 PORTE 0 Address bit 8 or Data bit 8
RE1/AD9 PORTE 1 Address bit 9 or Data bit 9
RE2/AD10 PORTE 2 Address bit 10 or Data bit 10
RE3/AD11 PORTE 3 Address bit 11 or Data bit 11
RE4/AD12 PORTE 4 Address bit 12 or Data bit 12
RE5/AD13 PORTE 5 Address bit 13 or Data bit 13
RE6/AD14 PORTE 6 Address bit 14 or Data bit 14
RE7/AD15 PORTE 7 Address bit 15 or Data bit 15
RH0/A16 PORTH 0 Address bit 16
RH1/A17 PORTH 1 Address bit 17
RH2/A18 PORTH 2 Address bit 18
RH3/A19 PORTH 3 Address bit 19
RJ0/ALE PORTJ 0 Address Latch Enable (ALE) Control pin
RJ1/OE
PORTJ 1 Output Enable (OE) Control pin
RJ2/WRL
PORTJ 2 Write Low (WRL) Control pin
RJ3/WRH
PORTJ 3 Write High (WRH) Control pin
RJ4/BA0 PORTJ 4 Byte Address bit 0 (BA0)
RJ5/CE
PORTJ 5 Chip Enable (CE) Control pin
RJ6/LB
PORTJ 6 Lower Byte Enable (LB) Control pin
RJ7/UB
PORTJ 7 Upper Byte Enable (UB) Control pin
Note: For the sake of clarity, only I/O port and external bus assignments are shown here. One or more additional
multiplexed features may be available on some pins.