Datasheet

PIC18F8722 FAMILY
DS39646C-page 30 © 2008 Microchip Technology Inc.
PORTJ is a bidirectional I/O port.
RJ0/ALE
RJ0
ALE
62
I/O
O
ST
—
Digital I/O.
External memory address latch enable.
RJ1/OE
RJ1
OE
61
I/O
O
ST
—
Digital I/O.
External memory output enable.
RJ2/WRL
RJ2
WRL
60
I/O
O
ST
—
Digital I/O.
External memory write low control.
RJ3/WRH
RJ3
WRH
59
I/O
O
ST
—
Digital I/O.
External memory write high control.
RJ4/BA0
RJ4
BA0
39
I/O
O
ST
—
Digital I/O.
External memory byte address 0 control.
RJ5/CE
RJ4
CE
40
I/O
O
ST
—
Digital I/O
External memory chip enable control.
RJ6/LB
RJ6
LB
41
I/O
O
ST
—
Digital I/O.
External memory low byte control.
RJ7/UB
RJ7
UB
42
I/O
O
ST
—
Digital I/O.
External memory high byte control.
VSS 11, 31, 51, 70 P — Ground reference for logic and I/O pins.
V
DD 12, 32, 48, 71 P — Positive supply for logic and I/O pins.
AVSS 26 P — Ground reference for analog modules.
AVDD 25 P — Positive supply for analog modules.
TABLE 1-4: PIC18F8527/8622/8627/8722 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog= Analog input
I = Input O = Output
P= Power I
2
C™/SMB = I
2
C/SMBus input buffer
Note 1: Alternate assignment for ECCP2 when Configuration bit, CCP2MX, is cleared (all operating modes except
Microcontroller mode).
2: Default assignment for ECCP2 in all operating modes (CCP2MX is set).
3: Alternate assignment for ECCP2 when CCP2MX is cleared (Microcontroller mode only).
4: Default assignment for P1B/P1C/P3B/P3C (ECCPMX is set).
5: Alternate assignment for P1B/P1C/P3B/P3C (ECCPMX is clear).