Datasheet

© 2008 Microchip Technology Inc. DS39646C-page 295
PIC18F8722 FAMILY
24.6 Operation During Sleep
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
24.7 Effects of a Reset
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
TABLE 24-1: REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
HLVDCON VDIRMAG
— IRVST HLVDEN HLVDL3 HLVDL2 HLVDL1 HLVDL0 58
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 57
PIR2
OSCFIF CMIF — EEIF BCL1IF HLVDIF TMR3IF CCP2IF 60
PIE2
OSCFIE CMIE — EEIE BCL1IE HLVDIE TMR3IE CCP2IE 60
IPR2 OSCFIP CMIP — EEIP BCL1IP HLVDIP TMR3IP CCP2IP 60
TRISA TRISA7
(1)
TRISA6
(1)
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 60
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
Note 1: PORTA<7:6> and their direction bits are individually configured as port pins based on various primary
oscillator modes. When disabled, these bits read as ‘0’.