Datasheet

© 2008 Microchip Technology Inc. DS39646C-page 105
PIC18F8722 FAMILY
FIGURE 7-6: EXTERNAL MEMORY BUS TIMING FOR SLEEP (MICROPROCESSOR MODE)
Q2Q1 Q3 Q4 Q2Q1 Q3 Q4
A<19:16>
ALE
OE
3AAAh
AD<15:0>
00h
00h
CE
Opcode Fetch
Opcode Fetch
SLEEP
SLEEP
from 007554h
Q1
Bus Inactive
(1)
0003h
3AABh
0E55h
Memory
Cycle
Instruction
Execution
INST(PC – 2)
Sleep Mode,
MOVLW 55h
from 007556h
Note 1: Bus becomes inactive regardless of power-managed mode entered when SLEEP is executed.