Datasheet

© 2009 Microchip Technology Inc. DS39775C-page 79
PIC18F87J50 FAMILY
FIGURE 5-7: DATA MEMORY MAP FOR PIC18F87J50 FAMILY DEVICES
Bank 0
Bank 1
Bank 14
Bank 15
Data Memory Map
BSR<3:0>
= 0000
= 0001
= 1111
060h
05Fh
F5Fh
FFFh
00h
5Fh
60h
FFh
Access Bank
When a = 0:
The BSR is ignored and the
Access Bank is used.
The first 96 bytes are general
purpose RAM (from Bank 0).
The remaining 160 bytes are
Special Function Registers
(from Bank 15).
When a = 1:
The BSR specifies the bank
used by the instruction.
F3Fh
F00h
EFFh
1FFh
100h
0FFh
000h
Access RAM
FFh
00h
FFh
00h
FFh
00h
GPR
(1)
GPR
(1)
SFR
(2)
Access RAM High
Access RAM Low
Bank 2
= 0010
(SFRs)
2FFh
200h
Bank 3
FFh
00h
GPR
(1)
FFh
= 0011
= 1101
GPR
(1)
GPR, BDT
(1)
GPR
(1)
GPR
(1)
GPR
(1)
GPR
(1)
GPR
(1)
GPR
(1)
GPR
(1)
GPR
(1)
GPR
(1)
4FFh
400h
5FFh
500h
3FFh
300h
FFh
00h
FFh
00h
FFh
00h
FFh
00h
FFh
00h
FFh
00h
FFh
00h
FFh
00h
FFh
00h
FFh
00h
FFh
00h
00h
GPR
(1)
GPR
(1)
= 0110
= 0111
= 1010
= 1100
= 1000
= 0101
= 1001
= 1011
= 0100
Bank 4
Bank 5
Bank 6
Bank 7
Bank 8
Bank 9
Bank 10
Bank 11
Bank 12
Bank 13
= 1110
6FFh
600h
7FFh
700h
8FFh
800h
9FFh
900h
AFFh
A00h
BFFh
B00h
CFFh
C00h
DFFh
D00h
E00h
Note 1: These banks also serve as RAM buffers for USB operation. See Section 5.3.1 “USB RAM” for more information.
2: Addresses, F40h through F5Fh, are not part of the Access Bank, therefore, specifying a BSR should be used to
access these registers.
40h
60h
Access RAM