Datasheet

© 2009 Microchip Technology Inc. DS39775C-page 69
PIC18F87J50 FAMILY
5.0 MEMORY ORGANIZATION
There are two types of memory in PIC18 Flash
microcontroller devices:
• Program Memory
• Data RAM
As Harvard architecture devices, the data and program
memories use separate busses; this allows for
concurrent access of the two memory spaces.
Additional detailed information on the operation of the
Flash program memory is provided in Section 6.0
“Flash Program Memory”.
5.1 Program Memory Organization
PIC18 microcontrollers implement a 21-bit program
counter which is capable of addressing a 2-Mbyte
program memory space. Accessing a location between
the upper boundary of the physically implemented
memory and the 2-Mbyte address will return all ‘0’s (a
NOP instruction).
The entire PIC18F87J10 family offers a range of
on-chip Flash program memory sizes, from 64 Kbytes
(up to 16,384 single-word instructions) to 128 Kbytes
(65,536 single-word instructions). The program
memory maps for individual family members are shown
in Figure 5-3.
FIGURE 5-1: MEMORY MAPS FOR PIC18F87J50 FAMILY DEVICES
Note: Sizes of memory areas are not to scale. Sizes of program memory areas are enhanced to show detail.
Unimplemented
Read as ‘0’
Unimplemented
Read as ‘0’
Unimplemented
Read as ‘0’
000000h
1FFFFFF
PIC18FX5J50 PIC18FX6J50 PIC18FX6J55 PIC18FX7J50
007FFFh
00FFFFh
017FFFh
PC<20:0>
Stack Level 1
•
Stack Level 31
•
•
CALL, CALLW, RCALL,
RETURN, RETFIE, RETLW,
21
User Memory Space
On-Chip
Memory
On-Chip
Memory
On-Chip
Memory
On-Chip
Memory
ADDULNK, SUBULNK
Config. Words
Config. Words
Config. Words
Config. Words
01FFFFh
Unimplemented
Read as ‘0’