Datasheet

PIC18F87J50 FAMILY

PMCONL Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu

PMMODEH Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu

PMMODEL Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu

PMDOUT2H Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu

PMDOUT2L Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu

PMDIN2H Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu

PMDIN2L Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu

PMEH Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu

PMEL Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu

PMSTATH Feature1 PIC18F8XJ5X 00-- 0000 00-- 0000 uu-- uuuu

PMSTATL Feature1 PIC18F8XJ5X 10-- 1111 10-- 1111 uu-- uuuu

TABLE 4-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Power-on Reset,

Brown-out Reset

MCLR

Resets

WDT Reset

RESET Instruction

Stack Resets

CM Resets

Wake-up via WDT

or Interrupt

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

4: See Table 4-1 for Reset value for specific condition.