Datasheet
PIC18F87J50 FAMILY
DS39775C-page 66 © 2009 Microchip Technology Inc.
PMADDRH Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu
PMDOUT1H Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu
PMADDRL Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu
PMDOUT1L Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu
PMDIN1H Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu
PMDIN1L Feature1 PIC18F8XJ5X 0000 0000 0000 0000 uuuu uuuu
UCON Feature1 PIC18F8XJ5X -0x0 000- -0x0 000- -uuu uuu-
USTAT Feature1 PIC18F8XJ5X -xxx xxx- -xxx xxx- -uuu uuu-
UEIR Feature1 PIC18F8XJ5X 0--0 0000 0--0 0000 u--u uuuu
UIR Feature1 PIC18F8XJ5X -000 0000 -000 0000 -uuu uuuu
UFRMH Feature1 PIC18F8XJ5X ---- -xxx ---- -xxx ---- -uuu
UFRML Feature1 PIC18F8XJ5X xxxx xxxx xxxx xxxx uuuu uuuu
UCFG Feature1 PIC18F8XJ5X 00-0 0000 00-0 0000 uu-u uuuu
UADDR Feature1 PIC18F8XJ5X -000 0000 -uuu uuuu -uuu uuuu
UEIE Feature1 PIC18F8XJ5X 0--0 0000 0--0 0000 u--u uuuu
UIE Feature1 PIC18F8XJ5X -000 0000 -000 0000 -uuu uuuu
UEP15 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP14 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP13 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP12 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP11 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP10 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP9 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP8 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP7 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP6 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP5 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP4 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP3 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP2 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP1 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
UEP0 Feature1 PIC18F8XJ5X ---0 0000 ---0 0000 ---u uuuu
PMCONH Feature1 PIC18F8XJ5X 0-00 0000 0-00 0000 u-uu uuuu
TABLE 4-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR
Resets
WDT Reset
RESET Instruction
Stack Resets
CM Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 4-1 for Reset value for specific condition.