Datasheet

PIC18F87J50 FAMILY
DS39775C-page 468 © 2009 Microchip Technology Inc.
Writing ......................................................................103
Unexpected Termination .................................. 106
Write Verify ...................................................... 106
FSCM. See Fail-Safe Clock Monitor.
G
GOTO ............................................................................... 386
H
Hardware Multiplier ..........................................................119
8 x 8 Multiplication Algorithms ................................. 119
Operation .................................................................119
Performance Comparison (table) ............................. 119
I
I/O Ports ........................................................................... 137
Input Pull-up Configuration ...................................... 138
Open-Drain Outputs ................................................. 138
Pin Capabilities ........................................................ 137
TTL Input Buffer Option ........................................... 138
I
2
C Mode (MSSP)
Acknowledge Sequence Timing ............................... 272
Associated Registers ...............................................278
Baud Rate Generator ............................................... 265
Bus Collision
During a Repeated Start Condition .................. 276
During a Stop Condition ................................... 277
Clock Arbitration .......................................................266
Clock Stretching ....................................................... 258
10-Bit Slave Receive Mode (SEN = 1) ............. 258
10-Bit Slave Transmit Mode ............................. 258
7-Bit Slave Receive Mode (SEN = 1) ............... 258
7-Bit Slave Transmit Mode ............................... 258
Clock Synchronization and the CKP bit ................... 259
Effects of a Reset ..................................................... 273
General Call Address Support ................................. 262
I
2
C Clock Rate w/BRG ............................................. 265
Master Mode ............................................................ 263
Operation ......................................................... 264
Reception ......................................................... 269
Repeated Start Condition Timing ..................... 268
Start Condition Timing ..................................... 267
Transmission .................................................... 269
Multi-Master Communication, Bus Collision and Arbitra-
tion ................................................................... 273
Multi-Master Mode ................................................... 273
Operation .................................................................248
Read/Write
Bit Information (R/W Bit) ............... 248, 251
Registers .................................................................. 243
Serial Clock (RC3/SCKx/SCLx) ............................... 251
Slave Mode ..............................................................248
Addressing ....................................................... 248
Addressing Masking Modes
5-Bit ......................................................... 249
7-Bit ......................................................... 250
Reception ......................................................... 251
Transmission .................................................... 251
Sleep Operation ....................................................... 273
Stop Condition Timing ..............................................272
INCF .................................................................................386
INCFSZ ............................................................................ 387
In-Circuit Debugger .......................................................... 364
In-Circuit Serial Programming (ICSP) ...................... 349, 364
Indexed Literal Offset Addressing
and Standard PIC18 Instructions ............................. 412
Indexed Literal Offset Mode ............................................. 412
Indirect Addressing ............................................................ 91
INFSNZ ............................................................................ 387
Initialization Conditions for All Registers ...................... 61–67
Instruction Cycle ................................................................ 76
Clocking Scheme ....................................................... 76
Flow/Pipelining ........................................................... 76
Instruction Set .................................................................. 365
ADDLW .................................................................... 371
ADDWF .................................................................... 371
ADDWF (Indexed Literal Offset Mode) .................... 413
ADDWFC ................................................................. 372
ANDLW .................................................................... 372
ANDWF .................................................................... 373
BC ............................................................................ 373
BCF ......................................................................... 374
BN ............................................................................ 374
BNC ......................................................................... 375
BNN ......................................................................... 375
BNOV ...................................................................... 376
BNZ ......................................................................... 376
BOV ......................................................................... 379
BRA ......................................................................... 377
BSF .......................................................................... 377
BSF (Indexed Literal Offset Mode) .......................... 413
BTFSC ..................................................................... 378
BTFSS ..................................................................... 378
BTG ......................................................................... 379
BZ ............................................................................ 380
CALL ........................................................................ 380
CLRF ....................................................................... 381
CLRWDT ................................................................. 381
COMF ...................................................................... 382
CPFSEQ .................................................................. 382
CPFSGT .................................................................. 383
CPFSLT ................................................................... 383
DAW ........................................................................ 384
DCFSNZ .................................................................. 385
DECF ....................................................................... 384
DECFSZ .................................................................. 385
Extended Instructions .............................................. 407
Considerations when Enabling ........................ 412
Syntax .............................................................. 407
Use with MPLAB IDE Tools ............................. 414
General Format ........................................................ 367
GOTO ...................................................................... 386
INCF ........................................................................ 386
INCFSZ .................................................................... 387
INFSNZ .................................................................... 387
IORLW ..................................................................... 388
IORWF ..................................................................... 388
LFSR ....................................................................... 389
MOVF ...................................................................... 389
MOVFF .................................................................... 390
MOVLB .................................................................... 390
MOVLW ................................................................... 391
MOVWF ................................................................... 391
MULLW .................................................................... 392
MULWF .................................................................... 392
NEGF ....................................................................... 393
NOP ......................................................................... 393
Opcode Field Descriptions ....................................... 366
POP ......................................................................... 394
PUSH ....................................................................... 394
RCALL ..................................................................... 395
RESET ..................................................................... 395
RETFIE .................................................................... 396