Datasheet

PIC18F87J50 FAMILY

The use of the flag and control bits in the OSCCON

“Power-Managed Modes”.

2.4.2 OSCILLATOR TRANSITIONS

PIC18F87J10 family devices contain circuitry to

prevent clock “glitches” when switching between clock

sources. A short pause in the device clock occurs dur-

ing the clock switch. The length of this pause is the sum

of two cycles of the old clock source and three to four

cycles of the new clock source. This formula assumes

that the new clock source is stable.

Clock transitions are discussed in greater detail in

Section 3.1.2 “Entering Power-Managed Modes”.

Note 1: The Timer1 oscillator must be enabled to

select the Timer1 clock. The Timer1 oscil-

lator is enabled by setting the T1OSCEN

bit in the Timer1 Control register

(T1CON<3>). If the Timer1 oscillator is not

enabled, then any attempt to select the

Timer1 clock source will be ignored.

2: It is recommended that the Timer1

oscillator be operating and stable prior to

switching to it as the clock source; other-

wise, a very long delay may occur while

the Timer1 oscillator starts.