Datasheet

PIC18F87J50 FAMILY

U-1 U-1 U-1 U-1 R/WO-1 R/WO-1 R/WO-1 R/WO-1

— — — — MSSPMSK PMPMX

(1)

ECCPMX

(1)

CCP2MX

bit 7 bit 0

Legend:

R = Readable bit WO = Write-Once bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 7-4 Unimplemented: Maintain as ‘1’

bit 3 MSSPMSK: MSSP V3’s 7-Bit Address Masking Mode Enable bit

1 = 7-Bit Address Masking mode enable

0 = 5-Bit Address Masking mode enable

bit 2 PMPMX: PMP pin placement bit for the 80-pin TQFP

(1)

1 = PMP pins placed on EMB

0 = PMP pins placed else where

bit 1 ECCPMX: ECCPx MUX bit

(1)

1 = ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5;

ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3

0 = ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6;

ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4

bit 0 CCP2MX: ECCP2 MUX bit

1 = ECCP2/P2A is multiplexed with RC1

0 = ECCP2/P2A is multiplexed with RE7 in Microcontroller mode (all devices) or with RB3 in Extended

Microcontroller mode (80-pin devices only)

Note 1: Implemented only on 80-pin devices.