Datasheet

© 2009 Microchip Technology Inc. DS39775C-page 355
PIC18F87J50 FAMILY
REGISTER 25-5: CONFIG3L: CONFIGURATION REGISTER 3 LOW (BYTE ADDRESS 300004h)
R/WO-1 R/WO-1 R/WO-1 R/WO-1 R/WO-1 U-0 U-0 U-0
WAIT
(1)
BW
(1)
EMB1
(1)
EMB0
(1)
EASHFT
(1)
— — —
bit 7 bit 0
Legend:
R = Readable bit WO = Write-Once bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 WAIT: External Bus Wait Enable bit
(1)
1 = Wait states on the external bus are disabled
0 = Wait states on the external bus are enabled and selected by MEMCON<5:4>
bit 6 BW: Data Bus Width Select bit
(1)
1 = 16-Bit Data Width modes
0 = 8-Bit Data Width modes
bit 5-4 EMB1:EMB0: External Memory Bus Configuration bits
(1)
11 = Microcontroller mode, external bus disabled
10 = Extended Microcontroller mode, 12-bit address width for external bus
01 = Extended Microcontroller mode, 16-bit address width for external bus
00 = Extended Microcontroller mode, 20-bit address width for external bus
bit 3 EASHFT: External Address Bus Shift Enable bit
(1)
1 = Address shifting enabled – external address bus is shifted to start at 000000h
0 = Address shifting disabled – external address bus reflects the PC value
bit 2-0 Unimplemented: Read as ‘0’
Note 1: Implemented only on 80-pin devices.