Datasheet

PIC18F87J50 FAMILY

PORTH is a bidirectional I/O port (continued).

RH7/PMWR/AN15/P1B

RH7

PMWR

(7)

AN15

P1B

(5)

I/O

—

Analog

—

Digital I/O.

Parallel Master Port write strobe.

Analog input 15.

ECCP1 PWM output B.

TABLE 1-4: PIC18F8XJ5X PINOUT I/O DESCRIPTIONS (CONTINUED)

Pin Name

Pin Number

Type

Buffer

Type

Description

80-TQFP

Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output

ST = Schmitt Trigger input with CMOS levels Analog = Analog input

I = Input O = Output

P = Power OD = Open-Drain (no P diode to V

DD)

Note 1: Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Extended Microcontroller

mode).

2: Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX is set).

3: Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).

4: Alternate assignment for ECCP2/P2A when CCP2MX is cleared (Microcontroller mode).

5: Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).

6: Pin placement when PMPMX = 1.

7: Pin placement when PMPMX = 0.

8: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.