Datasheet

PIC18F87J50 FAMILY
DS39775C-page 300 © 2009 Microchip Technology Inc.
TABLE 20-10: REGISTERS ASSOCIATED WITH SYNCHRONOUS SLAVE RECEPTION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page:
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 61
PIR1
PMPIF ADIF RC1IF TX1IF SSP1IF CCP1IF TMR2IF TMR1IF 64
PIE1 PMPIE ADIE RC1IE TX1IE SSP1IE CCP1IE TMR2IE TMR1IE 64
IPR1 PMPIP ADIP RC1IP TX1IP SSP1IP CCP1IP TMR2IP TMR1IP 64
PIR3
SSP2IF BCL2IF RC2IF TX2IF TMR4IF CCP5IF CCP4IF CCP3IF 64
PIE3 SSP2IE BCL2IE RC2IE TX2IE TMR4IE CCP5IE CCP4IE CCP3IE 64
IPR3 SSP2IP BCL2IP RC2IP TX2IP TMR4IP CCP5IP CCP4IP CCP3IP 64
RCSTAx SPEN RX9 SREN CREN
ADDEN FERR OERR RX9D 63
RCREGx EUSARTx Receive Register 63
TXSTAx CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 63
BAUDCONx
ABDOVF RCIDL DTRXP SCKP BRG16 — WUE ABDEN 65
SPBRGHx EUSARTx Baud Rate Generator Register High Byte 65
SPBRGx EUSARTx Baud Rate Generator Register Low Byte 65
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for synchronous slave reception.