Datasheet

PIC18F87J50 FAMILY
DS39775C-page 26 © 2009 Microchip Technology Inc.
PORTD is a bidirectional I/O port.
RD0/AD0/PMD0
RD0
AD0
PMD0
(6)
72
I/O
I/O
I/O
ST
TTL
TTL
Digital I/O.
External memory address/data 0.
Parallel Master Port data.
RD1/AD1/PMD1
RD1
AD1
PMD1
(6)
69
I/O
I/O
I/O
ST
TTL
TTL
Digital I/O.
External memory address/data 1.
Parallel Master Port data.
RD2/AD2/PMD2
RD2
AD2
PMD2
(6)
68
I/O
I/O
I/O
ST
TTL
TTL
Digital I/O.
External memory address/data 2.
Parallel Master Port data.
RD3/AD3/PMD3
RD3
AD3
PMD3
(6)
67
I/O
I/O
I/O
ST
TTL
TTL
Digital I/O.
External memory address/data 3.
Parallel Master Port data.
RD4/AD4/PMD4/
SDO2
RD4
AD4
PMD4
(6)
SDO2
66
I/O
I/O
I/O
O
ST
TTL
TTL
—
Digital I/O.
External memory address/data 4.
Parallel Master Port data.
SPI data out.
RD5/AD5/PMD5/
SDI2/SDA2
RD5
AD5
PMD5
(6)
SDI2
SDA2
65
I/O
I/O
I/O
I
I/O
ST
TTL
TTL
ST
ST
Digital I/O.
External memory address/data 5.
Parallel Master Port data.
SPI data in.
I
2
C™ data I/O.
TABLE 1-4: PIC18F8XJ5X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
80-TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
Note 1: Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Extended Microcontroller
mode).
2: Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX is set).
3: Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
4: Alternate assignment for ECCP2/P2A when CCP2MX is cleared (Microcontroller mode).
5: Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).
6: Pin placement when PMPMX = 1.
7: Pin placement when PMPMX = 0.
8: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.