Datasheet

PIC18F87J50 FAMILY
DS39775C-page 24 © 2009 Microchip Technology Inc.
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
RB0/FLT0/INT0
RB0
FLT0
INT0
58
I/O
I
I
TTL
ST
ST
Digital I/O.
ECCP1/2/3 Fault input.
External interrupt 0.
RB1/INT1/PMA4
RB1
INT1
PMA4
57
I/O
I
O
TTL
ST
—
Digital I/O.
External interrupt 1.
Parallel Master Port address.
RB2/INT2/PMA3
RB2
INT2
PMA3
56
I/O
I
O
TTL
ST
—
Digital I/O.
External interrupt 2.
Parallel Master Port address.
RB3/INT3/ECCP2/
P2A/PMA2
RB3
INT3
ECCP2
(1)
P2A
(1)
PMA2
55
I/O
I
I/O
O
O
TTL
ST
ST
—
—
Digital I/O.
External interrupt 3.
Capture 2 input/Compare 2 output/PWM2 output.
ECCP2 PWM output A.
Parallel Master Port address.
RB4/KBI0/PMA1
RB4
KBI0
PMA1
54
I/O
I
I/O
TTL
TTL
—
Digital I/O.
Interrupt-on-change pin.
Parallel Master Port address.
RB5/KBI1/PMA0
RB5
KBI1
PMA0
53
I/O
I
I/O
TTL
TTL
—
Digital I/O.
Interrupt-on-change pin.
Parallel Master Port address.
RB6/KBI2/PGC
RB6
KBI2
PGC
52
I/O
I
I/O
TTL
TTL
ST
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP™ programming clock pin.
RB7/KBI3/PGD
RB7
KBI3
PGD
47
I/O
I
I/O
TTL
TTL
ST
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming data pin.
TABLE 1-4: PIC18F8XJ5X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
80-TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
Note 1: Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Extended Microcontroller
mode).
2: Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX is set).
3: Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
4: Alternate assignment for ECCP2/P2A when CCP2MX is cleared (Microcontroller mode).
5: Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).
6: Pin placement when PMPMX = 1.
7: Pin placement when PMPMX = 0.
8: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.