Datasheet

© 2009 Microchip Technology Inc. DS39775C-page 183
PIC18F87J50 FAMILY
11.3.11 MASTER MODE TIMING
This section contains a number of timing examples that
represent the common Master mode configuration
options. These options vary from 8-bit to 16-bit data,
fully demultiplexed to fully multiplexed address, as well
as wait states.
FIGURE 11-12: READ AND WRITE TIMING, 8-BIT DATA, DEMULTIPLEXED ADDRESS
FIGURE 11-13: READ TIMING, 8-BIT DATA, PARTIALLY MULTIPLEXED ADDRESS
FIGURE 11-14: READ TIMING, 8-BIT DATA, WAIT STATES ENABLED,
PARTIALLY MULTIPLEXED ADDRESS
PMCS2
PMWR
PMRD
PMPIF
PMD<7:0>
PMCS1
PMA<13:0>
Q2 Q3 Q4Q1 Q2 Q3 Q4Q1 Q2 Q3 Q4Q1Q2 Q3 Q4Q1 Q2 Q3 Q4Q1 Q2 Q3 Q4Q1
BUSY
Q2 Q3 Q4Q1
PMCS2
PMWR
PMRD
PMALL
PMD<7:0>
PMCS1
PMA<13:8>
Q2 Q3 Q4Q1 Q2 Q3 Q4Q1 Q2 Q3 Q4Q1Q2 Q3 Q4Q1 Q2 Q3 Q4Q1 Q2 Q3 Q4Q1
PMPIF
BUSY
Address<7:0> Data
PMCS2
PMRD
PMWR
PMALL
PMD<7:0>
PMCS1
PMA<13:8>
Q1- - -
PMPIF
Q1- - - Q1- - - Q1- - - Q1- - - Q1- - - Q1- - - Q1- - - Q1- - - Q1- - - Q1- - - Q1- - - Q1- - - Q1- - -
WAITM<3:0> = 0010
WAITE<1:0> = 00
WAITB<1:0> = 01
BUSY
Address<7:0>
Data