Datasheet

© 2009 Microchip Technology Inc. DS39775C-page 169
PIC18F87J50 FAMILY
REGISTER 11-2: PMCONL: PARALLEL PORT CONTROL REGISTER LOW BYTE
R/W-0 R/W-0 R/W-0
(1)
R/W-0
(1)
R/W-0
(1)
R/W-0 R/W-0 R/W-0
CSF1 CSF0 ALP CS2P CS1P BEP WRSP RDSP
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 CSF1:CSF0: Chip Select Function bits
11 = Reserved
10 = PMCS1 and PMCS2 function as chip select
01 = PMCS2 functions as chip select, PMCS1 used as address bit 14 (PMADDRH address bit 6)
00 = PMCS2 and PMCS1 used as address bits 15 and 14 (PMADDRH address bits 7 and 6)
bit 5 ALP: Address Latch Polarity bit
(1)
1 = Active-high (PMALL and PMALH)
0 = Active-low (PMALL
and PMALH)
bit 4 CS2P: Chip Select 2 Polarity bit
(1)
1 = Active-high (PMCS2)
0 =Active-low (PMCS2
)
bit 3 CS1P: Chip Select 1 Polarity bit
(1)
1 = Active-high (PMCS1/PMCS)
0 =Active-low (PMCS1
/PMCS)
bit 2 BEP: Byte Enable Polarity bit
1 = Byte enable active-high (PMBE)
0 = Byte enable active-low (PMBE
)
bit 1 WRSP: Write Strobe Polarity bit
For Slave modes and Master Mode 2 (PMMODEH<1:0> = 00,01,10):
1 = Write strobe active-high (PMWR)
0 = Write strobe active-low (PMWR)
For Master
Mode 1 (PMMODEH<1:0> = 11):
1 = Enable strobe active-high (PMENB)
0 = Enable strobe active-low (PMENB)
bit 0 RDSP: Read Strobe Polarity bit
For Slave modes and Master Mode 2 (PMMODEH<1:0> =
00,01,10):
1 = Read strobe active-high (PMRD)
0 = Read strobe active-low (PMRD)
For Master Mode 1 (PMMODEH<1:0> =
11):
1 = Read/write strobe active-high (PMRD/PMWR)
0 = Read/write strobe active-low (PMRD
/PMWR)
Note 1: These bits have no effect when their corresponding pins are used as address lines.