Datasheet

PIC18F87J50 FAMILY

10.10 PORTJ, TRISJ and

LATJ Registers

PORTJ is an 8-bit wide, bidirectional port. All pins on

PORTJ are digital only and tolerate voltages up to 5.5V.

All pins on PORTJ are implemented with Schmitt

Trigger input buffers. Each pin is individually

configurable as an input or output.

When the external memory interface is enabled, all of

the PORTJ pins function as control outputs for the

interface. This occurs automatically when the interface

is enabled by clearing the EBDIS control bit

(MEMCON<7>). The TRISJ bits are also overridden.

Each of the PORTJ pins has a weak internal pull-up.

The pull-ups are provided to keep the inputs at a known

state for the external memory interface while powering

up. A single control bit can turn off all the pull-ups. This

is performed by clearing bit RJPU (PORTG<5>). The

weak pull-up is automatically turned off when the port

pin is configured as an output. The pull-ups are

disabled on any device Reset.

EXAMPLE 10-9: INITIALIZING PORTJ

Note: PORTJ is available only on 80-pin devices.

Note: These pins are configured as digital inputs

on any device Reset.

CLRF PORTJ ; Initialize PORTG by

; clearing output

; data latches

CLRF LATJ ; Alternate method to clear

; output data latches

MOVLW 0CFh ; Value used to initialize

; data direction

MOVWF TRISJ ; Set RJ3:RJ0 as inputs

; RJ5:RJ4 as output

; RJ7:RJ6 as inputs