Datasheet

© 2009 Microchip Technology Inc. DS39775C-page 161
PIC18F87J50 FAMILY
10.9 PORTH, LATH and
TRISH Registers
PORTH is an 8-bit wide, bidirectional I/O port. PORTH
pins <3:0> are digital only and tolerate voltages up to
5.5V.
All pins on PORTH are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
When the external memory interface is enabled, four of
the PORTH pins function as the high-order address
lines for the interface. The address output from the
interface takes priority over other digital I/O. The
corresponding TRISH bits are also overridden. PORTH
pins, RH4 through RH7, are multiplexed with analog
converter inputs. The operation of these pins as analog
inputs is selected by clearing or setting the
corresponding bits in the ANCON1 register. RH3 to
RH6 is multiplexed with Parallel Master Port and RH4
to RH6 are multiplexed as comparator pins.
PORTH can also be configured as the alternate
Enhanced PWM output channels B and C for the
ECCP1 and ECCP3 modules. This is done by clearing
the ECCPMX Configuration bit.
EXAMPLE 10-8: INITIALIZING PORTH
Note: PORTH is available only on 80-pin
devices.
CLRF PORTH ; Initialize PORTH by
; clearing output
; data latches
CLRF LATH ; Alternate method to
; clear output latches
BSF WDTCON,ADSHR; Enable write/read to
; the shared SFR
MOVLW F0h ; Configure PORTH as
MOVWF ANCON1 ; digital I/O
BCF WDTCON,ADSHR; Disable write/read to
; the shared SFR
MOVLW 0CFh ; Value used to initialize
; data direction
MOVWF TRISH ; Set RH3:RH0 as inputs
; RH5:RH4 as outputs
; RH7:RH6 as inputs