Datasheet

PIC18F87J50 FAMILY
DS39775C-page 16 © 2009 Microchip Technology Inc.
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
RB0/FLT0/INT0
RB0
FLT0
INT0
48
I/O
I
I
TTL
ST
ST
Digital I/O.
ECCP1/2/3 Fault input.
External interrupt 0.
RB1/INT1/PMA4
RB1
INT1
PMA4
47
I/O
I
O
TTL
ST
—
Digital I/O.
External interrupt 1.
Parallel Master Port address.
RB2/INT2/PMA3
RB2
INT2
PMA3
46
I/O
I
O
TTL
ST
—
Digital I/O.
External interrupt 2.
Parallel Master Port address.
RB3/INT3/PMA2
RB3
INT3
PMA2
45
I/O
I
O
TTL
ST
—
Digital I/O.
External interrupt 3.
Parallel Master Port address.
RB4/KBI0/PMA1
RB4
KBI0
PMA1
44
I/O
I
I/O
TTL
TTL
—
Digital I/O.
Interrupt-on-change pin.
Parallel Master Port address.
RB5/KBI1/PMA0
RB5
KBI1
PMA0
43
I/O
I
I/O
TTL
TTL
—
Digital I/O.
Interrupt-on-change pin.
Parallel Master Port address.
RB6/KBI2/PGC
RB6
KBI2
PGC
42
I/O
I
I/O
TTL
TTL
ST
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP™ programming clock pin.
RB7/KBI3/PGD
RB7
KBI3
PGD
37
I/O
I
I/O
TTL
TTL
ST
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming data pin.
TABLE 1-3: PIC18F6XJ5X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
64-TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
Note 1: Default assignment for ECCP2/P2A when CCP2MX Configuration bit is set.
2: Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared.
3: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.