Datasheet

PIC18F87J50 FAMILY
DS39775C-page 150 © 2009 Microchip Technology Inc.
TABLE 10-10: PORTD FUNCTIONS
Pin Name Function
TRIS
Setting
I/O
I/O
Type
Description
RD0/AD0/
PMD0
RD0 0 O DIG LATD<0> data output.
1 I ST PORTD<0> data input.
AD0
(2)
x O DIG External memory interface, address/data bit 0 output.
(1)
x I TTL External memory interface, data bit 0 input.
(1)
PMD0
(3)
x O DIG Parallel Master Port data out.
x I TTL Parallel Master Port data input.
RD1/AD1/
PMD1
RD1 0 O DIG LATD<1> data output.
1 I ST PORTD<1> data input.
AD1
(2)
x O DIG External memory interface, address/data bit 1 output.
(1)
x I TTL External memory interface, data bit 1 input.
(1)
PMD1
(3)
x O DIG Parallel Master Port data out.
x I TTL Parallel Master Port data input.
RD2/AD2/
PMD2
RD2 0 O DIG LATD<2> data output.
1 I ST PORTD<2> data input.
AD2
(2)
x O DIG External memory interface, address/data bit 2 output.
(1)
x I TTL External memory interface, data bit 2 input.
(1)
PMD2
(3)
x O DIG Parallel Master Port data out.
x I TTL Parallel Master Port data input.
RD3/AD3/
PMD3
RD3 0 O DIG LATD<3> data output.
1 I ST PORTD<3> data input.
AD3
(2)
x O DIG External memory interface, address/data bit 3 output.
(1)
x I TTL External memory interface, data bit 3 input.
(1)
PMD3
(3)
x O DIG Parallel Master Port data out.
x I TTL Parallel Master Port data input.
RD4/AD4/
PMD4/SDO2
RD4 0 O DIG LATD<4> data output.
1 I ST PORTD<4> data input.
AD4
(2)
x O DIG External memory interface, address/data bit 4 output.
(1)
x I TTL External memory interface, data bit 4 input.
(1)
PMD4
(3)
x O DIG Parallel Master Port data out.
x I TTL Parallel Master Port data input.
SDO2 0 O DIG SPI data output (MSSP2 module); takes priority over port data.
RD5/AD5/
PMD5/SDI2/
SDA2
RD5 0 O DIG LATD<5> data output.
1 I ST PORTD<5> data input.
AD5
(2)
x O DIG External memory interface, address/data bit 5 output.
(1)
x I TTL External memory interface, data bit 5 input.
(1)
PMD5
(3)
x O DIG Parallel Master Port data out.
x I TTL Parallel Master Port data input.
SDI2 1 I ST SPI data input (MSSP2 module).
SDA2 1 ODIGI
2
C™ data output (MSSP2 module); takes priority over port data.
1 ISTI
2
C data input (MSSP2 module); input type depends on module setting.
Legend: O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Note 1: External memory interface I/O takes priority over all other digital and PMP I/O.
2: Available on 80-pin devices only.
3: When PMPMX = 1.