Information

PIC18F8722 FAMILY
DS39646C-page 430 © 2008 Microchip Technology Inc.
C
C Compilers
MPLAB C18 .............................................................372
MPLAB C30 .............................................................372
CALL ................................................................................336
CALLW .............................................................................365
Capture (CCP Module) ..................................................... 181
Associated Registers ...............................................183
CCPRxH:CCPRxL Registers ...................................181
CCPx Pin Configuration ...........................................181
Prescaler ..................................................................181
Software Interrupt ....................................................181
Timer1/Timer3 Mode Selection ................................ 181
Capture (ECCP Module) ..................................................192
Capture/Compare/PWM (CCP) ........................................179
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................180
CCPRxH Register ....................................................180
CCPRxL Register .....................................................180
Compare Mode. See Compare.
Interconnect Configurations .....................................180
Module Configuration ...............................................180
Clock Sources ....................................................................37
Selecting the 31 kHz Source ......................................38
Selection Using OSCCON Register ...........................38
CLRF ................................................................................337
CLRWDT ..........................................................................337
Code Examples
16 x 16 Signed Multiply Routine ..............................118
16 x 16 Unsigned Multiply Routine ..........................118
8 x 8 Signed Multiply Routine .................................. 117
8 x 8 Unsigned Multiply Routine ..............................117
Changing Between Capture Prescalers ...................181
Computed GOTO Using an Offset Value ...................68
Data EEPROM Read ...............................................113
Data EEPROM Refresh Routine ..............................114
Data EEPROM Write ...............................................113
Erasing a Flash Program Memory Row .....................92
Fast Register Stack ....................................................68
How to Clear RAM (Bank 1) Using
Indirect Addressing ............................................81
Implementing a Real-Time Clock
Using a Timer1 Interrupt Service .....................169
Initializing PORTA ....................................................135
Initializing PORTB ....................................................137
Initializing PORTC ....................................................140
Initializing PORTD ....................................................143
Initializing PORTE ....................................................146
Initializing PORTF ....................................................149
Initializing PORTG ...................................................151
Initializing PORTH ....................................................154
Initializing PORTJ ....................................................156
Loading the SSP1BUF (SSP1SR) Register .............208
Reading a Flash Program Memory Word .................. 91
Saving STATUS, WREG and BSR
Registers in RAM .............................................134
Writing to Flash Program Memory .......................94–95
Code Protection ............................................................... 297
COMF ...............................................................................338
Comparator ......................................................................281
Analog Input Connection Considerations .................285
Associated Registers ...............................................285
Configuration ............................................................282
Effects of a Reset .....................................................284
Interrupts ..................................................................284
Operation ................................................................. 283
Operation During Sleep ........................................... 284
Outputs .................................................................... 283
Reference ................................................................ 283
External Signal ................................................ 283
Internal Signal .................................................. 283
Response Time ........................................................ 283
Comparator Specifications ............................................... 394
Comparator Voltage Reference ....................................... 287
Accuracy and Error .................................................. 288
Associated Registers ............................................... 289
Configuring .............................................................. 287
Connection Considerations ...................................... 288
Effects of a Reset .................................................... 288
Operation During Sleep ........................................... 288
Comparator Voltage Reference Specifications ................ 394
Compare (CCP Module) .................................................. 182
Associated Registers ............................................... 183
CCPRx Registers ..................................................... 182
Pin Configuration ..................................................... 182
Software Interrupt .................................................... 182
Special Event Trigger .............................................. 182
Timer1/Timer3 Mode Selection ................................ 182
Compare (CCP Modules)
Special Event Trigger .............................................. 175
Compare (ECCP Module) ................................................ 192
Special Event Trigger .............................................. 192
Compare (ECCP2 Module)
Special Event Trigger .............................................. 280
Computed GOTO ............................................................... 68
Configuration Bits ............................................................ 297
Configuration Register Protection .................................... 320
Context Saving During Interrupts ..................................... 134
Conversion Considerations .............................................. 426
CPFSEQ .......................................................................... 338
CPFSGT .......................................................................... 339
CPFSLT ........................................................................... 339
Crystal Oscillator/Ceramic Resonator ................................ 31
Customer Change Notification Service ............................ 439
Customer Notification Service ......................................... 439
Customer Support ............................................................ 439
D
Data Addressing Modes .................................................... 81
Comparing Addressing Modes with the
Extended Instruction Set Enabled ..................... 84
Direct ......................................................................... 81
Indexed Literal Offset ................................................ 83
Instructions Affected .......................................... 83
Indirect ....................................................................... 81
Inherent and Literal .................................................... 81
Data EEPROM
Code Protection ....................................................... 320
Data EEPROM Memory ................................................... 111
Associated Registers ............................................... 115
EEADR and EEADRH Registers ............................. 111
EECON1 and EECON2 Registers ........................... 111
Operation During Code-Protect ............................... 114
Protection Against Spurious Write ........................... 114
Reading ................................................................... 113
Using ....................................................................... 114
Write Verify .............................................................. 113
Writing ..................................................................... 113