Information

PIC18F8722 FAMILY
DS39646C-page 186 © 2008 Microchip Technology Inc.
TABLE 17-4: REGISTERS ASSOCIATED WITH PWM, TIMER2 AND TIMER4
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 57
RCON IPEN
SBOREN — RI TO PD POR BOR 56
PIR1
PSPIF ADIF RC1IF TX1IF SSP1IF CCP1IF TMR2IF TMR1IF 60
PIE1 PSPIE ADIE RC1IE TX1IE SSP1IE CCP1IE TMR2IE TMR1IE 60
IPR1 PSPIP ADIP RC1IP TX1IP SSP1IP CCP1IP TMR2IP TMR1IP 60
PIR3
SSP2IF BCL2IF RC2IF TX2IF TMR4IF CCP5IF CCP4IF CCP3IF 60
PIE3 SSP2IE BCL2IF RC2IE TX2IE TMR4IE CCP5IE CCP4IE CCP3IE 60
IPR3 SSP2IP BCL2IP RC2IP TX2IP TMR4IP CCP5IP CCP4IP CCP3IP 60
TMR2 Timer2 Register 58
PR2 Timer2 Period Register 58
T2CON
— T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 58
TMR4 Timer4 Register 61
PR4 Timer4 Period Register 61
T4CON
— T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0 61
CCPR1L Enhanced Capture/Compare/PWM Register 1 Low Byte 59
CCPR1H Enhanced Capture/Compare/PWM Register 1 High Byte 59
CCPR2L Enhanced Capture/Compare/PWM Register 2 Low Byte 59
CCPR2H Enhanced Capture/Compare/PWM Register 2 High Byte 59
CCP4CON
— — DC4B1 DC4B0 CCP4M3 CCP4M2 CCP4M1 CCP4M0 61
CCP5CON — — DC5B1 DC5B0 CCP5M3 CCP5M2 CCP5M1 CCP5M0 61
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PWM, Timer2 or Timer4.