Information

PIC18F8722 FAMILY
DS39646C-page 178 © 2008 Microchip Technology Inc.
16.2 Timer4 Interrupt
The Timer4 module has an 8-bit Period register, PR4,
which is both readable and writable. Timer4 increments
from 00h until it matches PR4 and then resets to 00h on
the next increment cycle. The PR4 register is initialized
to FFh upon Reset.
16.3 Output of TMR4
The output of TMR4 (before the postscaler) is used
only as a PWM time base for the CCP modules. It is not
used as a baud rate clock for the MSSP, as is the
Timer2 output.
FIGURE 16-1: TIMER4 BLOCK DIAGRAM
TABLE 16-1: REGISTERS ASSOCIATED WITH TIMER4 AS A TIMER/COUNTER
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 57
IPR3
SSP2IP BCL2IP RC2IP TX2IP TMR4IP CCP5IP CCP4IP CCP3IP 60
PIR3 SSP2IF BCL2IF RC2IF TX2IF TMR4IF CCP5IF CCP4IF CCP3IF 60
PIE3
SSP2IE BCL2IE RC2IE TX2IE TMR4IE CCP5IE CCP4IE CCP3IE 60
TMR4 Timer4 Register 61
T4CON
— T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0 61
PR4 Timer4 Period Register 61
Legend: x = unknown, u = unchanged, — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer4 module.
Comparator
TMR4
Sets Flag
TMR4
Output
(1)
Reset
Postscaler
Prescaler
PR4
2
F
OSC/4
1:1 to 1:16
1:1, 1:4, 1:16
EQ
4
bit TMR4IF
T4OUTPS<3:0>
T4CKPS<1:0>