Datasheet
PIC32MX3XX/4XX
DS61143H-page 152 © 2011 Microchip Technology Inc.
29.1 DC Characteristics
TABLE 29-1: OPERATING MIPS VS. VOLTAGE
Characteristic
V
DD Range
(in Volts)
Temp. Range
(in °C)
Max. Frequency
PIC32MX3XX/4XX
DC5 2.3V-3.6V -40°C to +85°C 80 MHz (Note 1)
DC5b 2.3V-3.6V -40°C to +105°C 80 MHz (Note 1)
Note 1: 40 MHz maximum for PIC32MX320F032H and PIC32MX420F032H devices.
TABLE 29-2: THERMAL OPERATING CONDITIONS
Rating Symbol Min. Typical Max. Unit
Industrial Temperature Devices
Operating Junction Temperature Range TJ -40 — +125 °C
Operating Ambient Temperature Range T
A -40 — +85 °C
V-Temp Temperature Devices
Operating Junction Temperature Range T
J -40 — +140 °C
Operating Ambient Temperature Range T
A -40 — +105 °C
Power Dissipation:
Internal Chip Power Dissipation:
PINT = VDD x (IDD – S IOH)
PD PINT + PI/O W
I/O Pin Power Dissipation:
I/O = S ({V
DD – VOH} x IOH) + S (VOL x IOL))
Maximum Allowed Power Dissipation P
DMAX (TJ – TA)/θJA W
TABLE 29-3: THERMAL PACKAGING CHARACTERISTICS
Characteristics Symbol Typical Max. Unit Notes
Package Thermal Resistance, 121-Pin XBGA (10x10x1.1 mm)
θJA 40 — °C/W 1
Package Thermal Resistance, 100-Pin TQFP (12x12x1 mm) θJA 43 — °C/W 1
Package Thermal Resistance, 64-Pin TQFP (10x10x1 mm) θJA 47 — °C/W 1
Package Thermal Resistance, 64-Pin QFN (9x9x0.9 mm) θJA 28 — °C/W 1
Note 1: Junction to ambient thermal resistance, Theta-JA (θJA) numbers are achieved by package simulations.
TABLE 29-4: DC TEMPERATURE AND VOLTAGE SPECIFICATIONS
DC CHARACTERISTICS
Standard Operating Conditions: 2.3V to 3.6V
(unless otherwise stated)
Operating temperature -40°C ≤ TA ≤ +85°C for Industrial
-40°C ≤ T
A ≤ +105°C for V-Temp
Param.
No.
Symbol Characteristics Min. Typical Max. Units Conditions
Operating Voltage
DC10 V
DD Supply Voltage 2.3 — 3.6 V —
DC12 VDR RAM Data Retention Voltage
(Note 1)
1.75 — — V —
DC16 V
POR VDD Start Voltage
to Ensure Internal
Power-on Reset Signal
1.75 — 1.95 V —
DC17 SVDD VDD Rise Rate
to Ensure Internal
Power-on Reset Signal
0.05 — — V/ms —
Note 1: This is the limit to which V
DD can be lowered without losing RAM data.