Datasheet

© 2011 Microchip Technology Inc. DS61143H-page 141
PIC32MX3XX/4XX
27.0 INSTRUCTION SET
The PIC32MX3XX/4XX family instruction set complies
with the MIPS32 Release 2 instruction set architecture.
PIC32MX does not support the following features:
CoreExtend instructions
Coprocessor 1 instructions
Coprocessor 2 instructions
Table 27-1 provides a summary of the instructions that
are implemented by the PIC32MX3XX/4XX family
core.
Note: Refer to “MIPS32
®
Architecture for Pro-
grammers Volume II: The MIPS32
®
Instruction Set” at www.mips.com for
more information.
TABLE 27-1: MIPS32
®
INSTRUCTION SET
Instruction Description Function
ADD Integer Add Rd = Rs + Rt
ADDI Integer Add Immediate Rt = Rs + Immed
ADDIU Unsigned Integer Add Immediate Rt = Rs +
U
Immed
ADDU Unsigned Integer Add Rd = Rs +
U
Rt
AND Logical AND Rd = Rs & Rt
ANDI Logical AND Immediate Rt = Rs & (0
16
|| Immed)
B Unconditional Branch
(Assembler idiom for: BEQ r0, r0, offset)
PC += (int)offset
BAL Branch and Link
(Assembler idiom for: BGEZAL r0, offset)
GPR[31] = PC + 8
PC += (int)offset
BEQ Branch on Equal if Rs == Rt
PC += (int)offset
BEQL Branch on Equal Likely
(1)
if Rs == Rt
PC += (int)offset
else
Ignore Next Instruction
BGEZ Branch on Greater Than or Equal to Zero if !Rs[31]
PC += (int)offset
BGEZAL Branch on Greater Than or Equal to Zero and Link GPR[31] = PC + 8
if !Rs[31]
PC += (int)offset
BGEZALL Branch on Greater Than or Equal to Zero and Link
Likely
(1)
GPR[31] = PC + 8
if !Rs[31]
PC += (int)offset
else
Ignore Next Instruction
BGEZL Branch on Greater Than or Equal to Zero Likely
(1)
if !Rs[31]
PC += (int)offset
else
Ignore Next Instruction
BGTZ Branch on Greater Than Zero if !Rs[31] && Rs != 0
PC += (int)offset
BGTZL Branch on Greater Than Zero Likely
(1)
if !Rs[31] && Rs != 0
PC += (int)offset
else
Ignore Next Instruction
BLEZ Branch on Less Than or Equal to Zero if Rs[31] || Rs == 0
PC += (int)offset
Note 1: This instruction is deprecated and should not be used.