Datasheet

PIC32MX3XX/4XX
DS61143H-page 140 © 2011 Microchip Technology Inc.
REGISTER 26-6: DDPCON: DEBUG DATA PORT CONTROL REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
r-x r-x r-x r-x r-x r-x r-x r-x
— — — — — — — —
23:16
r-x r-x r-x r-x r-x r-x r-x r-x
— — — — — — — —
15:8
r-x r-x r-x r-x r-x r-x r-x r-x
— — — — — — — —
7:0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-1 R/W-0 r-x r-x
DDPUSB DDPU1 DDPU2 DDPSPI1 JTAGEN TROEN — —
Legend:
R = Readable bit W = Writable bit P = Programmable bit r = Reserved bit
U = Unimplemented bit -n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
bit 31-8 Reserved: Write ‘0’; ignore read
bit 7 DDPUSB: Debug Data Port Enable for USB bit
1 = USB peripheral ignores USBFRZ (U1CNFG1<5>) setting
0 = USB peripheral follows USBFRZ setting
bit 6 DDPU1: Debug Data Port Enable for UART1 bit
1 = UART1 peripheral ignores FRZ (U1MODE<14>) setting
0 = UART1 peripheral follows FRZ setting
bit 5 DDPU2: Debug Data Port Enable for UART2 bit
1 = UART2 peripheral ignores FRZ (U2MODE<14>) setting
0 = UART2 peripheral follows FRZ setting
bit 4 DDPSPI1: Debug Data Port Enable for SPI1 bit
1 = SPI1 peripheral ignores FRZ (SPI1CON<14>) setting
0 = SPI1 peripheral follows FRZ setting
bit 3 JTAGEN: JTAG Port Enable bit
1 = Enable JTAG Port
0 = Disable JTAG Port
bit 2 TROEN: Trace Output Enable bit
1 = Enable Trace Port
0 = Disable Trace Port
bit 1-0 Reserved: Write ‘1’; ignore read