Datasheet
PIC32MX3XX/4XX
DS61143H-page 138 © 2011 Microchip Technology Inc.
26.3 On-Chip Voltage Regulator
All PIC32MX3XX/4XX device’s core and digital logic
are designed to operate at a nominal 1.8V. To simplify
system designs, most devices in the
PIC32MX3XX/4XX incorporate an on-chip regulator
providing the required core logic voltage from V
DD.
The internal 1.8V regulator is controlled by the
ENVREG pin. Tying this pin to V
DD enables the regu-
lator, which in turn provides power to the core. A low
ESR capacitor (such as tantalum) must be connected
to the V
CORE/VCAP pin (Figure 26-2). This helps to
maintain the stability of the regulator. The recom-
mended value for the filer capacitor is provided in
Section 29.1 “DC Characteristics”.
Tying the ENVREG pin to V
SS disables the regulator. In
this case, separate power for the core logic at a nomi-
nal 1.8V must be supplied to the device on the
V
CORE/VCAP pin.
Alternatively, the V
CORE/VCAP and VDD pins can be tied
together to operate at a lower nominal voltage. Refer to
Figure 26-2 for possible configurations.
26.3.1 ON-CHIP REGULATOR AND POR
When the voltage regulator is enabled, it takes fixed
delay for it to generate output. During this time, desig-
nated as T
PU, code execution is disabled. TPU is applied
every time the device resumes operation after any
power-down, including Sleep mode.
If the regulator is disabled, a separate Power-up Timer
(PWRT) is automatically enabled. The PWRT adds a
fixed delay of T
PWRT at device start-up. See
Section 29.0 “Electrical Characteristics” for more
information on TPU AND TPWRT.
26.3.2 ON-CHIP REGULATOR AND BOR
When the on-chip regulator is enabled,
PIC32MX3XX/4XX devices also have a simple brown-
out capability. If the voltage supplied to the regulator is
inadequate to maintain a regulated level, the regulator
Reset circuitry will generate a Brown-out Reset. This
event is captured by the BOR flag bit (RCON<1>). The
brown-out voltage levels are specific in Section 29.1
“DC Characteristics”.
26.3.3 POWER-UP REQUIREMENTS
The on-chip regulator is designed to meet the power-up
requirements for the device. If the application does not
use the regulator, then strict power-up conditions must
be adhered to. While powering up, V
CORE must never
exceed VDD by 0.3 volts.
FIGURE 26-2: CONNECTIONS FOR THE ON-CHIP REGULATOR
Note: It is important that the low ESR capacitor
is placed as close as possible to the
VCORE/VCAP pin.
VDD
ENVREG
V
CORE/VCAP
VSS
PIC32MX
3.3V
(1)
1.8V
(1)
VDD
ENVREG
V
CORE/VCAP
VSS
PIC32MX
CEFC
3.3V
Regulator Enabled (ENVREG tied to VDD): Regulator Disabled (ENVREG tied to ground):
Note 1: These are typical operating voltages. Refer to
Section 29.1 “DC Characteristics”
for the full operating ranges of VDD
and V
CORE.
(10 μF typ)