Datasheet
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616F-page 28 Preliminary © 2009-2012 Microchip Technology Inc.
C1IN1+, C1IN2-,
C1IN1-, C1IN3-
C1OUT
I
O
Analog
—
No
Yes
Comparator 1 Inputs
Comparator 1 Output.
C2IN1+, C2IN2-,
C2IN1-, C2IN3-
C2OUT
I
O
Analog
—
No
Yes
Comparator 2 Inputs.
Comparator 2 Output.
C3IN1+, C3IN2-,
C2IN1-, C3IN3-
C3OUT
I
O
Analog
—
No
Yes
Comparator 3 Inputs.
Comparator 3 Output.
PMA0
PMA1
PMA2 -PMA13
PMBE
PMCS1, PMCS2
PMD0-PMD7
PMRD
PMWR
I/O
I/O
O
O
O
I/O
O
O
TTL/ST
TTL/ST
—
—
—
TTL/ST
—
—
No
No
No
No
No
No
No
No
Parallel Master Port Address Bit 0 Input (Buffered Slave modes) and
Output (Master modes).
Parallel Master Port Address Bit 1 Input (Buffered Slave modes) and
Output (Master modes).
Parallel Master Port Address Bits 2 - 13 (Demultiplexed Master Modes).
Parallel Master Port Byte Enable Strobe.
Parallel Master Port Chip Select 1 and 2 Strobe.
Parallel Master Port Data (Demultiplexed Master mode) or Address/
Data (Multiplexed Master modes).
Parallel Master Port Read Strobe.
Parallel Master Port Write Strobe.
FLT1
-FLT7
(1)
DTCMP1-DTCMP7
(1)
PWM1L-PWM7L
(1)
PWM1H-PWM7H
(1)
SYNCI1, SYNCI2
(1)
SYNCO1, SYNCO2
(1)
I
I
O
O
I
O
ST
ST
—
—
ST
—
Yes
Yes
No
No
Yes
Yes
PWM Fault input 1 through 7.
PWM Dead Time Compensation Input.
PWM Low output 1 through 7.
PWM High output 1 through 7.
PWM Synchronization Inputs 1 and 2.
PWM Synchronization Output 1 and 2.
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin
Type
Buffer
Type
PPS Description
Legend: CMOS = CMOS compatible input or output Analog = Analog input P = Power
ST = Schmitt Trigger input with CMOS levels O = Output I = Input
PPS = Peripheral Pin Select TTL = TTL input buffer
Note 1: This pin is available on dsPIC33EPXXX(MC/MU)806/810/814 devices only.
2: AV
DD must be connected at all times.
3: These pins are input only on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
4: These pins are only available on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
5: The availability of I
2
C interfaces varies by device. Refer to the “Pin Diagrams” section for availability.
Selection (SDAx/ SCLx or ASDAx/ASCLx) is made using the device Configuration bits ALTI2C1 and
ALTI2C2 (FPOR<5:4>). See Section 29.0 “Special Features” for more information.
6: Analog functionality is activated by enabling the USB module and is not controlled by the ANSEL register.