Datasheet
dsPIC33FJXXXGPX06A/X08A/X10A
DS70593D-page 356 2009-2012 Microchip Technology Inc.
IPC7 (Interrupt Priority Control 7) .............................121
IPC8 (Interrupt Priority Control 8) .............................122
IPC9 (Interrupt Priority Control 9) .............................123
NVMCOM (Flash Memory Control)....................... 79, 80
OCxCON (Output Compare x Control) ..................... 179
OSCCON (Oscillator Control) ................................... 148
OSCTUN (FRC Oscillator Tuning) ............................ 152
PLLFBD (PLL Feedback Divisor) .............................. 151
PMD1 (Peripheral Module Disable Control
Register 1) ........................................................ 157
PMD1 (Peripheral Module Disable
Control Register 1)............................................ 157
PMD2 (Peripheral Module Disable Control
Register 2) ........................................................ 159
PMD3 (Peripheral Module Disable Control
Register 3) ........................................................ 161
PMD3 (Peripheral Module Disable
Control Register 3)............................................ 161
RCON (Reset Control) ................................................84
RSCON (DCI Receive Slot Control)..........................235
SPIxCON1 (SPIx Control 1)......................................184
SPIxCON2 (SPIx Control 2)......................................186
SPIxSTAT (SPIx Status and Control) ....................... 183
SR (CPU Status).........................................................94
T1CON (Timer1 Control)...........................................168
TSCON (DCI Transmit Slot Control) ......................... 235
TxCON (T2CON, T4CON, T6CON or
T8CON Control) ................................................ 172
TyCON (T3CON, T5CON, T7CON or
T9CON Control) ................................................ 173
UxMODE (UARTx Mode).......................................... 197
UxSTA (UARTx Status and Control)......................... 199
Reset
Clock Source Selection............................................... 86
Special Function Register Reset States .....................87
Times ..........................................................................86
Reset Sequence.................................................................. 89
Resets................................................................................. 83
S
Serial Peripheral Interface (SPI) ....................................... 181
Software Simulator (MPLAB SIM)..................................... 269
Software Stack Pointer, Frame Pointer
CALLL Stack Frame.................................................... 67
Special Features of the CPU............................................. 251
SPI Module
SPI1 Register Map...................................................... 54
SPI2 Register Map...................................................... 54
Symbols Used in Opcode Descriptions............................. 260
System Control
Register Map............................................................... 66
T
Temperature and Voltage Specifications
AC ..................................................................... 282, 325
Timer1............................................................................... 167
Timer2/3, Timer4/5, Timer6/7 and Timer8/9 ..................... 169
Timing Characteristics
CLKO and I/O ........................................................... 285
Timing Diagrams
10-bit A/D Conversion (CHPS<1:0> = 01, SIMSAM = 0,
ASAM = 0, SSRC<2:0> = 000) ......................... 317
10-bit A/D Conversion (CHPS<1:0> = 01, SIMSAM = 0,
ASAM = 1, SSRC<2:0> = 111,
SAMC<4:0> = 00001) ....................................... 319
12-bit A/D Conversion (ASAM = 0, SSRC = 000)..... 315
CAN I/O .................................................................... 311
DCI AC-Link Mode.................................................... 310
DCI Multi -Channel, I
2
S Modes................................. 308
External Clock........................................................... 283
I2Cx Bus Data (Master Mode) .................................. 304
I2Cx Bus Data (Slave Mode) .................................... 306
I2Cx Bus Start/Stop Bits (Master Mode)................... 304
I2Cx Bus Start/Stop Bits (Slave Mode)..................... 306
Input Capture (CAPx) ............................................... 290
OC/PWM................................................................... 291
Output Compare (OCx)............................................. 290
Reset, Watchdog Timer, Oscillator Start-up Timer
and Power-up Timer ......................................... 286
Timer1, 2, 3, 4, 5, 6, 7, 8, 9 External Clock .............. 288
Timing Requirements
ADC Conversion (10-bit mode)................................. 329
ADC Conversion (12-bit Mode)................................. 329
CLKO and I/O ........................................................... 285
DCI AC-Link Mode............................................ 310, 312
DCI Multi-Channel, I
2
S Modes.......................... 309, 312
External Clock........................................................... 283
Input Capture............................................................ 290
SPIx Master Mode (CKE = 0) ................................... 326
SPIx Module Master Mode (CKE = 1) ...................... 326
SPIx Module Slave Mode (CKE = 0) ........................ 327
SPIx Module Slave Mode (CKE = 1) ........................ 327
Timing Specifications
10-bit A/D Conversion Requirements ....................... 319
12-bit A/D Conversion Requirements ....................... 316
CAN I/O Requirements ............................................. 311
I2Cx Bus Data Requirements (Master Mode)........... 305
I2Cx Bus Data Requirements (Slave Mode)............. 307
Output Compare Requirements................................ 290
PLL Clock ......................................................... 284, 325
Reset, Watchdog Timer, Oscillator Start-up Timer,
Power-up Timer and Brown-out
Reset Requirements......................................... 287
Simple OC/PWM Mode Requirements ..................... 291
Timer1 External Clock Requirements ....................... 288
Timer2, Timer4, Timer6 and Timer8 External
Clock Requirements ......................................... 289
Timer3, Timer5, Timer7 and Timer9 External
Clock Requirements ......................................... 289
U
UART Module
UART1 Register Map.................................................. 54
UART2 Register Map.................................................. 54
V
Voltage Regulator (On-Chip) ............................................ 256
W
Watchdog Timer (WDT)............................................ 251, 257
Programming Considerations ................................... 257
WWW Address ................................................................. 357
WWW, On-Line Support ..................................................... 16