Datasheet

dsPIC33FJXXXGPX06A/X08A/X10A
DS70593D-page 206  2009-2012 Microchip Technology Inc.
REGISTER 19-3: CiVEC: ECAN™ INTERRUPT CODE REGISTER
U-0 U-0 U-0 R-0 R-0 R-0 R-0 R-0
— — —FILHIT<4:0>
bit 15 bit 8
U-0 R-1 R-0 R-0 R-0 R-0 R-0 R-0
— ICODE<6:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-13 Unimplemented: Read as ‘0’
bit 12-8 FILHIT<4:0>: Filter Hit Number bits
10000-11111 = Reserved
01111 = Filter 15
•
•
•
00001 = Filter 1
00000 = Filter 0
bit 7 Unimplemented: Read as ‘0’
bit 6-0 ICODE<6:0>: Interrupt Flag Code bits
1000101-1111111 = Reserved
1000100 = FIFO almost full interrupt
1000011 = Receiver overflow interrupt
1000010 = Wake-up interrupt
1000001 = Error interrupt
1000000 = No interrupt
0010000-0111111 = Reserved
0001111 = RB15 buffer Interrupt
•
•
•
0001001 = RB9 buffer interrupt
0001000 = RB8 buffer interrupt
0000111 = TRB7 buffer interrupt
0000110 = TRB6 buffer interrupt
0000101 = TRB5 buffer interrupt
0000100 = TRB4 buffer interrupt
0000011 = TRB3 buffer interrupt
0000010 = TRB2 buffer interrupt
0000001 = TRB1 buffer interrupt
0000000 = TRB0 Buffer interrupt