Datasheet

dsPIC33FJXXXGPX06A/X08A/X10A
DS70593D-page 170  2009-2012 Microchip Technology Inc.
FIGURE 13-1: TIMER2/3 (32-BIT) BLOCK DIAGRAM
(1)
Set T3IF
Equal
Comparator
PR3
PR2
Reset
LSbMSb
Note 1: The 32-bit timer control bit, T32, must be set for 32-bit timer/counter operation. All control bits are respective
to the T2CON register.
2: The ADC event trigger is available only on Timer2/3.
Data Bus<15:0>
TMR3HLD
Read TMR2
Write TMR2
16
16
16
Q
QD
CK
TGATE
0
1
TON
TCKPS<1:0>
2
T
CY
TCS
1x
01
TGATE
00
T2CK
ADC Event Trigger
(2)
Gate
Sync
Prescaler
1, 8, 64, 256
Sync
TMR3
TMR2
16