Datasheet

 2009-2012 Microchip Technology Inc. DS70593D-page 149

dsPIC33FJXXXGPX06A/X08A/X10A

bit 1 LPOSCEN: Secondary (LP) Oscillator Enable bit

1 = Enable secondary oscillator

0 = Disable secondary oscillator

bit 0 OSWEN: Oscillator Switch Enable bit

1 = Request oscillator switch to selection specified by NOSC<2:0> bits

0 = Oscillator switch is complete

(1,3)

(CONTINUED)

Note 1: Writes to this register require an unlock sequence. Refer to Section 7. “Oscillator” (DS70186) in the

“dsPIC33F/PIC24H Family Reference Manual” for details.

2: Direct clock switches between any primary oscillator mode with PLL and FRCPLL mode are not permitted.

This applies to clock switches in either direction. In these instances, the application must switch to FRC

mode as a transition clock source between the two PLL modes.

3: This is register is reset only on a Power-on Reset (POR).