Datasheet

 2009-2012 Microchip Technology Inc. DS70593D-page 147
dsPIC33FJXXXGPX06A/X08A/X10A
For example, suppose a 10 MHz crystal is being used,
with “XT with PLL” being the selected oscillator mode.
If PLLPRE<4:0> = 0, then N1 = 2. This yields a VCO
input of 10/2 = 5 MHz, which is within the acceptable
range of 0.8-8 MHz. If PLLDIV<8:0> = 0x1E, then
M = 32. This yields a VCO output of 5 x 32 = 160 MHz,
which is within the 100-200 MHz range needed.
If PLLPOST<1:0> = 0, then N2 = 2. This provides a
Fosc of 160/2 = 80 MHz. The resultant device operating
speed is 80/2 = 40 MIPS.
EQUATION 9-3: XT WITH PLL MODE
EXAMPLE
FIGURE 9-2: dsPIC33FJXXXGPX06A/X08A/X10A PLL BLOCK DIAGRAM
TABLE 9-1: CONFIGURATION BIT VALUES FOR CLOCK SELECTION
FCY
FOSC
2
-------------
1
2
---
10000000 32
22
----------------------------------


40 MIPS== =
Oscillator Mode Oscillator Source POSCMD<1:0> FNOSC<2:0> See Note
Fast RC Oscillator with Divide-by-N
(FRCDIVN)
Internal xx 111 1, 2
Fast RC Oscillator with Divide-by-16
(FRCDIV16)
Internal xx 110 1
Low-Power RC Oscillator (LPRC) Internal xx 101 1
Secondary (Timer1) Oscillator (Sosc) Secondary xx 100 1
Primary Oscillator (HS) with PLL
(HSPLL)
Primary 10 011 —
Primary Oscillator (XT) with PLL
(XTPLL)
Primary 01 011 —
Primary Oscillator (EC) with PLL
(ECPLL)
Primary 00 011 1
Primary Oscillator (HS) Primary 10 010 —
Primary Oscillator (XT) Primary 01 010 —
Primary Oscillator (EC) Primary 00 010 1
Fast RC Oscillator with PLL (FRCPLL) Internal xx 001 1
Fast RC Oscillator (FRC) Internal xx 000 1
Note 1: OSC2 pin function is determined by the OSCIOFNC Configuration bit.
2: This is the default oscillator mode for an unprogrammed (erased) device.
0.8-8.0 MHz
Here
(1)
100-200 MHz
Here
(1)
Divide by
2, 4, 8
Divide by
2-513
Divide by
2-33
Source (Crystal, External Clock
PLLPRE
X
VCO
PLLDIV
PLLPOST
or Internal RC)
12.5-80 MHz
Here
(1)
FOSC
Note 1: This frequency range must be satisfied at all times.
FVCO
N1
M
N2