Datasheet

 2009-2012 Microchip Technology Inc. DS70593D-page 125
dsPIC33FJXXXGPX06A/X08A/X10A
REGISTER 7-26: IPC11: INTERRUPT PRIORITY CONTROL REGISTER 11
U-0 R/W-1 R/W-0 R/W-0 U-0 R/W-1 R/W-0 R/W-0
— T6IP<2:0> — DMA4IP<2:0>
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 R/W-1 R/W-0 R/W-0
— — — — — OC8IP<2:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0’
bit 14-12 T6IP<2:0>: Timer6 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 11 Unimplemented: Read as ‘0’
bit 10-8 DMA4IP<2:0>: DMA Channel 4 Data Transfer Complete Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 7-3 Unimplemented: Read as ‘0’
bit 2-0 OC8IP<2:0>: Output Compare Channel 8 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled