Datasheet

dsPIC33FJXXXGPX06A/X08A/X10A
DS70593D-page 112  2009-2012 Microchip Technology Inc.
REGISTER 7-13: IEC3: INTERRUPT ENABLE CONTROL REGISTER 3
U-0 U-0 R/W-0 R/W-0 R/W-0 U-0 U-0 R/W-0
— — DMA5IE DCIIE DCIEIE — —C2IE
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
C2RXIE INT4IE INT3IE T9IE T8IE MI2C2IE SI2C2IE T7IE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-14 Unimplemented: Read as ‘0’
bit 13 DMA5IE: DMA Channel 5 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 12 DCIIE: DCI Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 11 DCIEIE: DCI Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 10-9 Unimplemented: Read as ‘0’
bit 8 C2IE: ECAN2 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 7 C2RXIE: ECAN2 Receive Data Ready Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 6 INT4IE: External Interrupt 4 Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 5 INT3IE: External Interrupt 3 Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 4 T9IE: Timer9 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 3 T8IE: Timer8 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 2 MI2C2IE: I2C2 Master Events Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 1 SI2C2IE: I2C2 Slave Events Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 0 T7IE: Timer7 Interrupt Enable bit
1
= Interrupt request enabled
0 = Interrupt request not enabled