Datasheet
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616F-page 84 Preliminary © 2009-2012 Microchip Technology Inc.
TABLE 4-24: SPI1, SPI2, SPI3, and SPI4 REGISTER MAP
SFR Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
SPI1STAT
0240
SPIEN
—
SPISIDL
— —
SPIBEC<2:0> SRMPT SPIROV SRXMPT SISEL<2:0> SPITBF SPIRBF
0000
SPI1CON1
0242
— — —
DISSCK DISSDO MODE16 SMP CKE SSEN CKP MSTEN SPRE<2:0> PPRE<1:0>
0000
SPI1CON2
0244
FRMEN SPIFSD FRMPOL
— — — — — — — — — — —
FRMDLY SPIBEN
0000
SPI1BUF
0248
SPIx Transmit and Receive Buffer Register
0000
SPI2STAT
0260
SPIEN
—
SPISIDL
— —
SPIBEC<2:0> SRMPT SPIROV SRXMPT SISEL<2:0> SPITBF SPIRBF
0000
SPI2CON1
0262
— — —
DISSCK DISSDO MODE16 SMP CKE SSEN CKP MSTEN SPRE<2:0> PPRE<1:0>
0000
SPI2CON2
0264
FRMEN SPIFSD FRMPOL
— — — — — — — — — — —
FRMDLY SPIBEN
0000
SPI2BUF
0268
SPIx Transmit and Receive Buffer Register
0000
SPI3STAT
02A0
SPIEN
—
SPISIDL
— —
SPIBEC<2:0> SRMPT SPIROV SRXMPT SISEL<2:0> SPITBF SPIRBF
0000
SPI3CON1
02A2
— — —
DISSCK DISSDO MODE16 SMP CKE SSEN CKP MSTEN SPRE<2:0> PPRE<1:0>
0000
SPI3CON2
02A4
FRMEN SPIFSD FRMPOL
— — — — — — — — — — —
FRMDLY SPIBEN
0000
SPI3BUF
02A8
SPIx Transmit and Receive Buffer Register
0000
SPI4STAT
02C0
SPIEN
—
SPISIDL
— —
SPIBEC<2:0> SRMPT SPIROV SRXMPT SISEL<2:0> SPITBF SPIRBF
0000
SPI4CON1
02C2
— — —
DISSCK DISSDO MODE16 SMP CKE SSEN CKP MSTEN SPRE<2:0> PPRE<1:0>
0000
SPI4CON2
02C4
FRMEN SPIFSD FRMPOL
— — — — — — — — — — —
FRMDLY SPIBEN
0000
SPI4BUF
02C8
SPIx Transmit and Receive Buffer Register
0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.