Datasheet

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616F-page 602 Preliminary © 2009-2012 Microchip Technology Inc.
Revision F (February 2012)
This revision includes typographical and formatting
changes throughout the data sheet text.
Throughout the document, references to the package
formerly known as XBGA where changed to TFBGA.
In addition, where applicable, new sections were added
to each peripheral chapter that provide information and
links to related resources, as well as helpful tips. For
examples, see Section 18.1 “SPI Helpful Tips” and
Section 18.2 “SPI Resources”. The major changes
are referenced by their respective section in Table A-4.
TABLE A-4: MAJOR SECTION UPDATES
Section Name Update Description
“16-bit Microcontrollers and
Digital Signal Controllers (up to
512 KB Flash and 52 KB SRAM)
with High-Speed PWM, USB, and
Advanced Analog”
The content on the first page of this section was extensively reworked to
provide the reader with the key features and functionality of this device family in
an “at-a-glance” format.
The following devices were added to the Controller Families table (see Table 1
and the “Pin Diagrams” section):
• dsPIC33EP512MC806
• dsPIC33EP512GP806
• PIC24EP512GP806
Section 2.0 “Guidelines for
Getting Started with 16-bit Digital
Signal Controllers and
Microcontrollers”
Added Section 2.9 “Application Examples”
Section 3.0 “CPU” Updated the Status Register information in the Programmer’s Model (see
Figure 3-2).
Section 4.0 “Memory
Organization”
Added Interrupt Controller Register Maps (see Table 4-6 and Tabl e 4- 7 ).
Added Peripheral Pin Select Output Register Map (see Ta ble 4- 3 9 ).
Added PMD Register Maps (see Table 4-50 and Ta bl e 4 -51 ).
Added PORTF Register Map (see Ta bl e 4- 6 4 ).
Added PORTG Register Map (see Ta bl e 4- 6 7).
Updated the second note in Section 4.7 “Bit-Reversed Addressing
(dsPIC33EPXXXMU806/810/814 Devices Only)”.
Section 11.0 “I/O Ports” Added RPOR10: Peripheral Pin Select Output Register 10
(see Register 11-54).
Section 14.0 “Input Capture” Updated the Input Capture Module Block Diagram (see Figure 14-1).
Section 15.0 “Output Compare” Updated the Output Compare Module Block Diagram (see Figure 15-1).
Section 25.0 “Comparator
Module”
Updated the User-programmable Blanking Function Block Diagram (see
Figure 25-3).
Updated the bit definitions in the Comparator Mask Gating Control Register
(see Register 25-4).
Section 29.0 “Special Features” Added Note 3 to the Configuration Bits Description (see Ta b l e 2 9 -2 ).
Section 32.0 “Electrical
Characteristics”
Updated the I/O pin Absolute Maximum Ratings.
Updated Note 1 in the DC Characteristics: Operating Current (see Table 32-5).
Updated Note 1 in the DC Characteristics: Idle Current (see Ta ble 32 - 6).
Updated Note 1 in the DC Characteristics: Power-down Current
(see Table 32-7).
Updated Note 1 in the DC Characteristics: Doze Current (see Table 32-8).
Removed parameters DO16 and DO26, added parameter DO26a, updated
parameters DO10 and DO20, and added Note 1 in the DC Characteristics: I/O
Pin Output Specifications (see
Table 32-10).